1) Field of the Invention
This invention relates to integrated circuits and semiconductor devices. It relates particularly to a structure and method for producing integrated circuits having improved openings for fusible links.
2) Description of the Prior Art
Semiconductor chips often have openings over fusible link regions which frequently lower chip yields and reliability by allowing contamination to penetrate from the openings to the device regions. Fusible conductive links are used to rewire electrical circuits to replace defective devices with redundant devices. These circuits are rewired by rendering the fuses non-conductive (i.e. blown) by applying laser energy to the fuse with a laser repair machine.
In dynamic or static memory chips, defective memory cells may be replaced by blowing the fuses associated with the defective cells, and then activating a spare row or column of cells. The spare cells can be activated by blowing fuses using a laser or passing a high current through the fuse. This circuit rewiring using fusible links increases yields and reduces the production costs.
Logic circuits may also be repaired or reconfigured by blowing fuses. For example, it is common to initially fabricate a generic logic chip having a large number of interconnected logic gates. Then, in a final processing step, the chip is customized to perform a desired logic function by disconnecting the unnecessary logic elements by blowing the fuses that connect them to the desired circuitry. Still other applications of laser-blown fuses are possible.
An important challenge is to improve the reliability of the semiconductor devices surrounding fusible links, especially when a large number of the fuses are on a chip. A major problem with fusible links is that moisture and other contaminates can diffuse from the openings in the insulating layers in the fuse regions into the device areas thus reducing circuit reliability and yields.
FIG. 1 shows a top plan view of a semiconductor chip 11 with fusible links regions 12. A conventional fusible link 26, opening 28 and an adjacent device regions 60, 61, 62 are shown in FIG. 2. Referring to FIG. 3, a cross-sectional view of the fuse 26 and device regions taken along horizontal axis labeled 3 is shown. Additional layers, especially metal layers may be present but are not illustrated in the FIGS.
Fuse 26 is normally formed over a thick field oxide region 31 in semiconductor substrate 10. In addition, fuse 26 is formed over the field oxide region 31 to prevent shorting of the fuse 26 to the substrate 10 through a thinner insulating layer. Fuse 26 can be formed of a metal, such as aluminum, platinum silicide, or titanium tungsten; polysilicon; or a polycide, such as titanium polycide, tungsten polycide, or molybdenum polycide. Layers 32, 34, 36, 38 are insulating layers, such as borophosphosilicate glass, spin on glass, silicon oxide, and silicon nitride respectively. Opening 28 is formed over the fuse area through the insulating layers 32, 34, 36, 38. Generally, opening 28 can have a width in the range of 5 microns and a length of 5 microns. An adjacent semiconductor device is shown with buried N+ regions 60, 61, 62 isolation oxide 31, gate oxide 64, gate 66, via 40, and metal layers 68 70.
A laser can be used to "blow" the fuse rendering the fuse non-conductive. The laser is focused through an opening in the insulation layers over the fuse and irradiates the fuse. The fuse absorbs the heat from the irradiation, melts and the melted polysilicon fuse is removed by evaporation. In this operation, sometimes called laser trimming, the rapid temperature rise of the upper portion of the fuse causes an increase in pressure which can cause any overlying film 32 to be "blown off." The portion of the fuse and thin insulating layer which is melted away or "blown" must not deposit on or interfere with near-by devices. Laser trimming requires that only a very thin insulation layer covers the fuse because the laser must be able to be penetrate the layer and melt the fuse.
Because fuse melting is more efficient if the laser beam is not reduced by travel through intervening layers, it is conventional to have an opening 28 over the fuse in the area where the fuse will be heated. Because overlying layers would inhibit the laser, the passivation layers are normally opened to a single insulating layer covering the fuse 26. In the example shown in FIG. 3, an opening 28 is formed over fuse 26 through overlying layers: silicon nitride 38, silicon oxide 36 and inter-metal dielectric layer 34.
A major problem with any window opening in the passivation layers is that moisture and contaminates can enter through the exposed insulation layers and diffuse to the semiconductor devices. The diffused moisture and contaminates can decrease semiconductor device reliability and yields. Sources of contamination are all around; moisture is present in the air and sodium (Na+ ions) are plentiful in the environment.
As shown in FIG. 3, moisture and other contaminates can enter through the window 28 into layer 34 and diffuse through the layer 34 to the adjacent semiconductor devices 31 60 64. Two major problems which reduce chip yield can result: a) water can attack metal via's and b) sodium and other contaminates can harm metal oxide semiconductor (MOS) devices.
First, water can attack the metal via 40, with the following chemical reaction: EQU 3 H.sub.2 O+Al.fwdarw.Al(OH).sub.3 +3/2H.sub.2
The resulting aluminum oxide in the via 40 can increase the resistance which can cause circuit failure.
Second, contamination can also harm MOS devices. FIG. 3 shows an opening 28, buried N+ regions 60, 61, 62, field oxide 31, gate oxide 64, polysilicon gate 66, and metal layers 68 70. Mobile ions, such as sodium ions, can diffuse through inter-metal dielectric layer 34, and through the insulating layer 32 into the field oxide layer 31. Mobile ions in the field oxide layer 31 can cause field inversion which can result in undesired leakage current between adjacent buried N+ regions 60, 61 resulting in circuit failure. Also, mobile ions in the gate oxide 64 will cause a transistor threshold shift whereby circuit failures can occur.
The following three U.S. patents show fusible link structures, but do not solve the problems of moisture and contaminates diffusing through the window opening into the insulating layers and devices.
Billig et all, U.S. Pat. No. 5,025,300 discloses a method of forming a very thin protective insulating layer over the fuse in a window. In another embodiment, the thin protective insulating layer is formed after the fuse is blown. This invention prevents shorts between conductors that otherwise might occur due to debris from the fuse-blowing operation. However, the problem of moisture and contaminates diffusing through the insulating layers in the window opening still exists. Moreover, the protective insulting layer over the fuse degrades the laser irradiation on the fuse.
Takayama, U.S. Pat. No. 4,536,949 discloses a method of forming openings over fuses where each insulation layer is etched separately yielding a more accurate opening. However, the problem of contaminates diffusing to the devices through the exposed sidewalls of the opening still exists.
Motonami, U.S. Pat. No. 5,241,212 discloses a protective layer covering an opening through a single insulating layer for a fuse. In one embodiment, the protective layer only covers the surface of the protective layer, but leaves the sidewall of the insulating layer exposed for moisture and contaminates to diffuse through. In a second embodiment, the protective coating covers the top of the isolation layer, the sidewalls of the fuse opening and also covers the isolation layer over the fuse and the fuse. Unfortunately, the protective layer over the fuse inhibits the laser from heating the fuse which can cause problems in consistently successfully blowing the fuses. A solution must be found that prevents contaminates from entering into the sidewalls of the insulation layers, but does not inhibit the laser trimming operation.